A Chip-Level Optical Interconnect for CPU | |
Hao, Qinfen1; Qin, Mengyuan1; Qi, Nan2; Xue, Haiyun3; Han, Meng4; Li, Xiaolin1; Hao, Kai2; Niu, Xingmao3; Xiao, Limin4; Fan, Dongrui1 | |
刊名 | IEEE PHOTONICS TECHNOLOGY LETTERS |
2021-08-15 | |
卷号 | 33期号:16页码:852-855 |
关键词 | Integrated optics Optical interconnections Transceivers Adaptive optics Optical switches Optical sensors Power demand Optical interconnections digital integrated circuits very high speed integrated circuits chip scale packaging system integration |
ISSN号 | 1041-1135 |
DOI | 10.1109/LPT.2021.3084945 |
英文摘要 | With the rapid growth of electronic chip's performance, electric signal limits chip I/O in power consumption, reachability, and signal quality. In this letter, we propose a new chip-let architecture for chip-level optical interconnect. An optic I/O chip-let including an ultra-small optic transceiver and electronic components is implemented. Our analysis shows that the optical interconnect based on this architecture can achieve 1/3 power consumption and 1/2 area compared with traditional board-level optical interconnect in Ethernet NIC application. By adopting the architecture we proposed, the optic I/O chip-let can support any payload IC such as CPU, GPU, switch to have optic I/O. |
资助项目 | National Key Research and Development Program of China[2019YFB2203004] ; Beijing Science and Technology Program[Z191100004819006] |
WOS研究方向 | Engineering ; Optics ; Physics |
语种 | 英语 |
出版者 | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC |
WOS记录号 | WOS:000678334400014 |
内容类型 | 期刊论文 |
源URL | [http://119.78.100.204/handle/2XEOYT63/17435] |
专题 | 中国科学院计算技术研究所 |
通讯作者 | Hao, Qinfen |
作者单位 | 1.Chinese Acad Sci, Inst Comp Technol, Beijing 100190, Peoples R China 2.Chinese Acad Sci, Inst Semicond, Beijing 100083, Peoples R China 3.Chinese Acad Sci, Inst Microelect, Beijing 100029, Peoples R China 4.Beihang Univ, Sch Comp Sci & Engn, Beijing 100191, Peoples R China 5.AIO Core Co Ltd, Tokyo 1120014, Japan |
推荐引用方式 GB/T 7714 | Hao, Qinfen,Qin, Mengyuan,Qi, Nan,et al. A Chip-Level Optical Interconnect for CPU[J]. IEEE PHOTONICS TECHNOLOGY LETTERS,2021,33(16):852-855. |
APA | Hao, Qinfen.,Qin, Mengyuan.,Qi, Nan.,Xue, Haiyun.,Han, Meng.,...&Kurata, Kazuhiko.(2021).A Chip-Level Optical Interconnect for CPU.IEEE PHOTONICS TECHNOLOGY LETTERS,33(16),852-855. |
MLA | Hao, Qinfen,et al."A Chip-Level Optical Interconnect for CPU".IEEE PHOTONICS TECHNOLOGY LETTERS 33.16(2021):852-855. |
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