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	Design techniques for CMOS fractional-N frequency synthesizer
	Huang Shui-long ; Wang Zhi-hua
	2010-05-11 ; 2010-05-11
关键词	Practical Experimental/ CMOS integrated circuits frequency dividers frequency synthesizers phase detectors phase noise voltage-controlled oscillators/ CMOS fractional-N frequency synthesizer wireless communication channel width phase noise phase/frequency detector charge pump loop filter VCO frequency divider/ B1205 Analogue circuit design, modelling and testing B2570A Semiconductor integrated circuit design, layout, modelling and testing B1230B Oscillators B2570D CMOS integrated circuits
中文摘要	Modern wireless communication requires that the frequency synthesizer should have fast settling time, small channel width and low phase noise. Fractional-N frequency synthesizer is widely used due to its excellent performance in these aspects. Design techniques for CMOS fractional-N frequency synthesizers are systematically discussed in the paper. Finally, the research direction of the frequency synthesizer, as well as challenges in the development, is analyzed in brief.
语种	中文 ; 中文
出版者	Editorial Dept. Microelectronics ; China
内容类型	期刊论文
源URL	[http://hdl.handle.net/123456789/26437]
专题	清华大学
推荐引用方式 GB/T 7714	Huang Shui-long,Wang Zhi-hua. Design techniques for CMOS fractional-N frequency synthesizer[J],2010, 2010.
APA	Huang Shui-long,&Wang Zhi-hua.(2010).Design techniques for CMOS fractional-N frequency synthesizer..
MLA	Huang Shui-long,et al."Design techniques for CMOS fractional-N frequency synthesizer".(2010).

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